1/6 target data june 2003 this is preliminary information on a new product forseen to be developped. details are subject to change without notice sts5n150 n-channel 150v - 0.045 w - 5a so-8 low gate charge stripfet? power mosfet n typical r ds (on) = 0.045 w n extremely high dv/dt capability n extremely low gate charge description this mosfet series realized with stmicroelectronics unique stripfet process has specifically been designed to minimize input capacitance and gate charge. it is therefore suitable as primary switch in advanced high- efficiency, high-frequency isolated dc-dc converters for telecom and computer applications. it is also intended for any applications with low gate drive requirements. applications n high-efficiency dc-dc converters n ups and motor control ordering information type v dss r ds(on) i d sts5n150 150 v <0.06 w 5 a sales type marking package packaging sts5n150 s5n150 so-8 tape & reel so-8 internal schematic diagram absolute maximum ratings ( ) pulse width limited by safe operating area. symbol parameter value unit v ds drain-source voltage (v gs = 0) 150 v v dgr drain-gate voltage (r gs = 20 k w ) 150 v v gs gate- source voltage 20 v i d drain current (continuous) at t c = 25c 5a i d drain current (continuous) at t c = 100c 3a i dm ( ) drain current (pulsed) 20 a p tot total dissipation at t c = 25c 2.5 w t stg storage temperature -55 to 150 c t j operating junction temperature
sts5n150 2/6 thermal data (*) when mounted on 1 inch 2 fr-4 board, 2 oz of cu and t [ 10 sec. electrical characteristics (t case = 25 c unless otherwise specified) off on (* ) dynamic rthj-amb (*) thermal resistance junction-ambient max 50 c/w symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 150 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 2v r ds(on) static drain-source on resistance v gs = 10 v i d = 2.5 a 0.045 0.06 w symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds = 75 v i d =5 a tbd s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 tbd tbd tbd pf pf pf
3/6 sts5n150 switching on switching off source drain diode (*) pulsed: pulse duration = 300 s, duty cycle 1.5 %. ( ) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 75 v i d = 2.5 a r g = 4.7 w v gs = 10 v (resistive load, figure 1) tbd tbd ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 120v i d = 5a v gs = 10v (see test circuit, figure 2) tbd tbd tbd 28 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 75 v i d = 2.5 a r g = 4.7 w, v gs = 10 v (resistive load, figure 1) tbd tbd ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 5 20 a a v sd (*) forward on voltage i sd = 5 a v gs = 0 1.2 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 5 a di/dt = 100a/s v dd = 50 v t j = 150c (see test circuit, figure 3) tbd tbd tbd ns nc a electrical characteristics (continued)
sts5n150 4/6 fig. 2: gate charge test circuit fig. 3: test circuit for diode recovery behaviour fig. 1: switching times test circuits for resistive load
5/6 sts5n150 dim. mm inch min. typ. max. min. typ. max. a1.750.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.019 c1 45 (typ.) d 4.8 5.0 0.188 0.196 e 5.8 6.2 0.228 0.244 e1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.14 0.157 l 0.4 1.27 0.015 0.050 m0.60.023 s 8 (max.) 0016023 so-8 mechanical data
sts5n150 6/6 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics a 2003 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com
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